Core interconnect technology

Through-Glass Via Technology

Through-Glass Via (TGV) is the vertical interconnect technology behind glass-based 3D packaging. Zhongke Daojing forms dense micro-vias directly through glass substrates, then carries the process into filling, inspection, and downstream packaging readiness.

Sub-20μm glass micro-vias produced in repeatable batch process.
Positional tolerance controlled within ±3μm for fine-pitch interconnect and RDL fan-out.
Compatible with borosilicate, high-alumina silicate, alkali-free glass, and fused silica.

Request feasibility review View capability table

<20μm viasbatch glass micro-via formation

<±3μmposition tolerance across substrate

12″ / 510mmwafer and panel formats

TGV glass wafer held in gloved hand — TGV glass wafer with dense micro-via pattern for advanced packaging evaluation.

What this TGV platform includes

See process flow

Glass micro-via formation

Batch formation of glass micro-vias below 20μm, including vertical, tapered, oblong, and application-specific via profiles.

Via data

Micro-via metallization and filling

Conductive through-vias and blind vias down to sub-30μm using paste fill, electroplating, or electroplate-thickening with resin plug.

Fill route

Glass-based system packaging

TGV substrates can continue into surface RDL, multilayer routing, bonding, dicing, balling, and electrical, mechanical, and hermetic testing.

System flow

TGV process capabilities at a glance

Parameter	Capability
Wafer size	2″ / 4″ / 6″ / 8″ / 12″
Panel size	Up to 510 × 510 mm
Glass materials	Borosilicate, high-alumina silicate, alkali-free glass, fused silica / quartz
Glass thickness	100 – 3000 μm for TGV glass substrates
Via profile	Vertical, tapered, oblong / slotted, and custom geometries
Via diameter	<20 μm glass micro-via formation
Positional tolerance	<±3 μm for TGV via placement
Filled via capability	High-density filled through-vias and blind vias below 30 μm
Integration path	RDL, bonding, dicing, balling, electrical / mechanical / hermetic testing

Why Glass Through Via

Low-loss routing in a dimensionally stable interposer material

Glass is electrically insulating, mechanically stable, and well suited for high-frequency packaging. Compared with silicon or organic substrates, glass can reduce substrate-related electrical loss while supporting fine routing, large-format substrates, and CTE tuning for different device stacks.

That makes TGV a strong fit for RF and millimeter-wave modules, MEMS and sensor packaging, CPO, Mini-LED, vacuum devices, and compact 3D integration where vertical routing density and signal integrity matter at the same time.

From via geometry to conductive interconnect

Formation

Via Formation

Via formation is qualified around material, thickness, profile, and positional tolerance. Standard structures include vertical vias, tapered vias, and oblong or slotted vias for routing, fiber insertion, or controlled filling.

Sub-20μm via formation in glass
100–3000μm glass thickness range
Geometry checked before sampling

Check via feasibility

Conductive Path

Metallization & Filling

The filling route is selected according to electrical, thermal, reliability, and downstream packaging requirements. Filled vias can then continue into RDL and wafer-level packaging flows.

Low-temperature paste fill
High-temperature paste fill
Electroplating, resin plug, and fully filled routes

Discuss fill route

Materials and application fit

Send your substrate

Borosilicate Glass

A practical platform for general glass interposer development, sampling, and cost-sensitive packaging programs.

Review design

Alkali-Free Glass

Used for electronic and display-related applications where ionic stability and substrate cleanliness matter.

Check material

High-Alumina Silicate

Selected for mechanically demanding structures that need stronger glass during fabrication and packaging.

Check strength needs

Fused Silica / Quartz

Chosen for low-loss, optical, RF, thermal, and high-purity environments.

Discuss quartz TGV

Where the TGV platform extends

Talk to engineers

High Vacuum

Conductive Silicon TGV Wafers

For high-isolation and high-hermeticity requirements, conductive silicon TGV wafers combine glass and silicon heterogeneous material structures and can support vacuum-level packaging concepts.

Glass / silicon heterogeneous reconstruction
High-isolation and high-vacuum packaging direction
Leak-rate target below 1 × 10⁻¹¹ Pa·m³/s

System Packaging

RDL, Bonding, Dicing and Test

The TGV substrate can connect into a system packaging flow rather than stopping at via formation. This helps customers reduce hand-offs between vendors and keep process ownership clear.

Surface RDL and multilayer routing
Anodic bonding, Au-Au bonding, laser welding options
Electrical, mechanical and hermeticity testing

Start with a process-feasibility review

Send layout

Share drawing, glass type, thickness, via size, pitch, profile, and target fill route.

Review route

Engineers confirm via geometry, material compatibility, tolerance budget, and filling method.

Sample build

Prototype wafers are produced with a production-intent process route and inspection records.

Scale process

The validated parameters are carried into batch production, RDL, bonding, or test flow.

Ready to evaluate your TGV design?

Send your drawing for a quote, or request a feasibility review before sampling.

Request review Ask about filling and RDL