Through Glass Via (TGV) technology forms conductive vertical interconnects through a glass substrate, enabling electrical signals to travel between the two wafer surfaces through compact, precisely positioned vias. TGV combines the electrical isolation and high-frequency performance of glass with the interconnect density required by modern semiconductor, RF, MEMS, photonic, and heterogeneous packaging systems.
Engineering summary: A complete TGV substrate is not only a drilled glass wafer. It is a coordinated structure combining controlled microvia geometry, conductive filling, surface redistribution routing, bonding interfaces, dicing, and verified electrical or hermetic performance.
What Is Through Glass Via Technology?
A through glass via is a micro-scale hole formed through a glass wafer or panel and converted into an electrical interconnect through conductive filling or metallization. The via connects circuitry on opposite surfaces of the substrate, reducing lateral routing distance and allowing compact three-dimensional package construction.
TGV substrates can be produced with vertical, oblique, waist-shaped, or application-specific via profiles. The correct geometry depends on substrate thickness, target diameter, fill process, electrical requirements, and downstream bonding conditions.
Core Functions of a TGV Substrate
- Vertical signal, ground, and power transmission through glass.
- Low-loss routing for radio-frequency and high-speed electrical systems.
- Wafer-level alignment between chips, sensors, cavities, and external contacts.
- Support for multilayer RDL networks and solder-ball interfaces.
- Hermetic package construction when combined with an appropriate bonding system.
Why Glass Is Used in Advanced Packaging
Glass offers high electrical resistivity, low dielectric loss, excellent surface quality, and material compositions with controllable thermal expansion. These properties make it valuable where conventional organic substrates introduce excessive signal loss or where silicon substrates cannot provide the required isolation.
| Glass Advantage | Packaging Benefit |
|---|---|
| High electrical isolation | Reduces substrate coupling and supports RF signal integrity. |
| Low dielectric loss | Improves high-frequency transmission performance. |
| Dimensional stability | Supports fine via pitch and multilayer alignment. |
| Optical transparency | Enables inspection, optical interfaces, and photonic packaging. |
| Tailored thermal expansion | Helps match silicon, compound semiconductor, or package materials. |
Available material families include borosilicate, high-alumina silicate, alkali-free, and quartz glass. Material selection should occur before via design because composition affects etching behavior, thermal processing, dielectric response, and bonding compatibility.
Core TGV Manufacturing Processes
A production-ready TGV package is built as a process chain. The sequence may vary, but most programs include substrate preparation, microvia formation, cleaning, metallization or filling, surface routing, bonding, dicing, and performance verification.
- Review substrate, drawing, tolerance, via profile, and package requirements.
- Select glass composition and microvia formation process.
- Form and inspect the via or microstructure array.
- Apply the selected conductive filling process.
- Construct surface RDL routing and external contact features.
- Complete bonding, dicing, and final testing.
Microvia Formation Methods
TGVGlass uses wafer-level high-precision sandblasting and laser-induced etching to cover different diameter, profile, cost, and throughput requirements. Both routes are batch-capable, but their practical strengths differ.
Wafer-Level Precision Sandblasting
Controlled abrasive processing forms via arrays and microstructures at high throughput. It is well suited to cost-sensitive production, larger structures, grooves, cavities, and complex panel formats.
Laser-Induced Etching
A laser modifies selected regions inside the glass, after which chemical etching removes the modified material. This method supports smaller holes and higher aspect ratios than conventional mechanical routes.
TGV Metal Filling Options
The best fill route depends on resistance, current capacity, hermeticity, thermal budget, via diameter, and production cost. Four common configurations cover most package requirements.
- Low-temperature conductive paste: limits heat exposure and supports temperature-sensitive assemblies.
- High-temperature conductive paste: improves stability where the substrate can tolerate a higher cure temperature.
- Electroplating with resin backfill: combines conductive sidewalls with structural support and controlled cost.
- Full electroplating: provides the highest metal volume for demanding electrical or hermetic performance.
Fill feasibility must be evaluated together with via geometry. Diameter, taper, aspect ratio, and glass thickness directly affect void control and plating uniformity.
Glass Surface RDL Routing
Redistribution layers extend the vertical TGV connections into a complete horizontal signal network. Fine conductive traces are patterned on the glass surface and connected to the filled via array. Successive dielectric and metal layers increase routing density before solder-ball placement or chip bonding.
TGVGlass supports glass surface line width and spacing above 30 µm with tolerances within ±5 µm. The final layer count and routing density are configured around logic, memory, compute, RF, or sensor package requirements.
Design consideration: Via pitch, RDL escape routing, pad size, solder-ball pitch, and dicing street width should be reviewed as one layout rather than optimized independently.
Wafer Bonding and Hermetic Packaging
Bonding transforms a routed substrate into a sealed or mechanically integrated package. Laser welding minimizes localized thermal impact, anodic bonding forms strong glass-silicon seals, and gold-gold bonding provides low-resistance metal interfaces for high-frequency packages.
For applications requiring electrical isolation and ultra-high hermeticity together, high-temperature glass reflow bonding can recombine glass and conductive silicon into a unified heterogeneous wafer. TGVGlass conductive silicon TGV wafers achieve leak rates below 1×10⁻¹¹ Pa·m³/s.
Critical TGV Design Parameters
A technical drawing should define the complete substrate and package interface, not only the nominal via diameter. Early agreement on the following parameters prevents tolerance conflicts during filling, routing, bonding, and dicing.
| Parameter | Information to Define |
|---|---|
| Substrate | Material, wafer or panel size, thickness, flatness, and surface finish. |
| Via array | Diameter, depth, pitch, profile, positional tolerance, and edge distance. |
| Metallization | Fill method, target resistance, current requirement, and hermeticity target. |
| RDL | Layer count, line width and spacing, pad dimensions, and ball pitch. |
| Assembly | Bonding method, dicing dimensions, inspection, testing, and delivery format. |
Applications of TGV Technology
TGV is used wherever low-loss vertical routing, high isolation, accurate wafer-level alignment, optical access, or hermetic packaging provides a measurable system advantage.
- RF filters, antennas, front-end modules, and communications packages.
- MEMS gyroscopes, accelerometers, pressure sensors, and vacuum devices.
- Mini-LED, photonic, optical fiber, and co-packaged optics assemblies.
- AI accelerators, GPU chiplets, logic devices, and high-bandwidth compute packages.
- Biomedical microfluidic, sensing, and glass microstructure platforms.
How to Start a TGV Project
Begin with the application requirement and finished package target. Provide the substrate material if already selected, overall dimensions, via array, electrical or hermetic targets, RDL layout, bonding interface, quantity, and delivery schedule. When the material or process route is undecided, TGVGlass can recommend a suitable combination during design review.
The typical path is engineering review, prototype fabrication, dimensional and performance verification, parameter confirmation, and volume production. Keeping the full chain under one production team reduces re-registration error and prevents separate supplier tolerances from accumulating in the finished package.
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